1. Field
This invention relates to channel adapters, and more specifically to channel adapters with enhanced performance due to implementation of a completion queue engine and address translation engine.
2. Background
Many systems that use switched fabric networks (e.g., Infiniband, Next Generation I/O (NGIO), etc.) use channel adapters to send information between nodes on a switched fabric network across the switched fabric network. Channel adapters may be used to connect a host processor to the fabric (e.g., host channel adapter), or connect an I/O adapter to the fabric (e.g., target channel adapter). Channel adapters may receive instructions for a task orwork to be performed by the channel adapter from an operating system or software application at the host processor or I/O adapter.
The channel adapter receives a virtual address or a portion of a virtual address from the operating system or application and converts this virtual address into a physical address of a memory location in system memory. Moreover, a channel adapter monitors progress of tasks or ongoing work to determine when the work has been completed, whereby the channel adapter may store a completion status so that the application or operating system may be alerted as to the completion of the work.
Much of the work performed by a channel adapter centers around retrieving information from system memory, converting the information into packets, and transporting the packets across the network, or vise versa. When work has been completed, notification of this fact is stored in a completion queue, resident in system memory. One entry in a completion queue may store completion status for several data buffers orwork queues in system memory. Further, there may be multiple completion queues.
In a channel adapter, the packet processing function may consist of a micro-engine running microcode. Microcode provides a flexible, but critical resource for the packet processing function. Each clock cycle causes a single instruction to be executed to facilitate packet processing. Adding routines in microcode to handle all of the address translation requests adds significant overhead to the microcode. Complex arithmetic and comparison operations are required to handle address translation. Similarly, adding routines in microcode to handle all of the processing required for support of completion queues also adds significant overhead to the microcode. Additionally, there are relatively long latencies associated with reads to system memory. Cycles spent executing instructions used to process address translations or a completion of an event, are instructions where messages are not being processed. One of the most important aspects of a channel adapter is its performance. Adding any overhead to the microcode-based packet processing function impacts performance and may have implications as to the efficacy of the channel adapter.
Therefore, there is a need for enhancing channel adapter performance without impacting the packet processing function.